The invention is in the field of integrated circuit architecture, and is more specifically directed to an architecture for a logic integrated circuit for synthesizing signals.
Many modern electronics systems utilize synthesized analog signals to carry out their functions. There synthesized signals are typically generated by circuits that are referred to in the art as frequency synthesizers. For example, communications systems utilize frequency synthesizers to generate carrier and modulated signals to be transmitted, as well as in the demodulation of received communications signals. Filter tuning circuits in communications systems also utilize signals generated by frequency synthesizers. In recent years, so-called xe2x80x9cfrequency agilexe2x80x9d communications systems have been developed, examples of which include spread spectrum local area networks (LANs), frequency hopped systems, and Code Division Multiple Access (CDMA) cellular telephone systems; each of these frequency agile systems also rely upon signals generated by frequency synthesizer circuits.
The rapid increase in the computing power that may be realized in an integrated circuit, according to modern technology, has expanded the ability of electronic systems to process multimedia information, including audio signals. Modern multimedia electronic systems, and multimedia functions embodied within computer systems, use frequency synthesizers to generate speech and music audio signals that are modeled as a sum of sinusoids, consistent with the Fourier theorem. For accurate synthesis of speech and audio signals, the frequency synthesizers in the multimedia systems are called upon to generate thousands of sinusoids at selected frequencies. For music synthesis, this sum of sinusoids may be combined with a stochastic components that models the xe2x80x9cnoisyxe2x80x9d component of musical sounds, to produce an overall realistic sound; this stochastic component corresponds to effects such as breath noises in wind instruments, bowing noise in bowed stringed instruments, and variations in the sound of different pianos (e.g., grand versus upright).
FIG. 1a illustrates a series of sinusoidal signal components to be generated by frequency synthesizer circuitry in complex electronic multimedia and communications systems. For purposes of digital signal processing, the time basis of these signals is generally subdivided into a series of frames, each frame containing a number of sample points. The complete synthesized signal sn(t) for the nth frame corresponds to the sum of M components, according to the relationship:             s      n        ⁢          (      t      )        =            ∑              m        =        1            M        ⁢          xe2x80x83        ⁢                  s        m        n            ⁢              (        t        )            
In the communications context, this complete signal s(t), over all frames, corresponds to a single channel; multiple channels, each with a synthesized signal s(t), are then multiplexed in the conventional fashion to effect multi-channel communication.
According to conventional signal synthesis techniques, each signal component within a single frame is subject to certain constraints. A typical example of such constraints, expressed for signal smn(t) of the mth component in the nth frame, is:
xe2x80x83smn(t)=Amn(t)sin{xcex8mn(t)}
where Amn(t) is the instantaneous amplitude of the signal component, and where xcex8mn(t) is its instantaneous phase. As evident from this expression, both the amplitude and phase may vary over time within each frame of the signal component according to specified time functions. FIG. 1b illustrates an enlarged view of signal smn(t) of the mth component in the nth frame of FIG. 1a (bounded within box 10). The time-dependent amplitude Amn(t) within this nth frame in this example is shown as a linearly increasing function with time, by way of example. Typically, certain constraints specifying the time-dependence of amplitude and phase are specified in the synthesis, such as the order (constant, linear, quadratic, etc.) with which the amplitude and phase may vary within a frame. Furthermore, while the particular time function for amplitude and phase variation may vary (and should vary, in order to communicate meaningful information) from frame to frame, the component signals smn(t) are required to be continuous across frame boundaries.
From the expression:
smn(t)=Amn(t)sin{xcex8mn(t)}
it can be readily seen that the signal synthesis process according to this approach requires three steps, namely instantaneous phase calculation, sinusoidal function calculation, and sinusoidal amplitude weighting. Logic circuit architectures for synthesizing signals in this manner are known in the art. One architecture, described in Houghton, et al., xe2x80x9cAn ASIC for digital additive sine-wave synthesisxe2x80x9d, Computer Music Journal, Vol. 19, No. 3 (1995), pp. 26-31, effectively integrates the instantaneous frequency of the signal component to derive the instantaneous phase, uses a table lookup for performing the sinusoidal calculation, and implements the sinusoidal amplitude by a multiplier. Another architecture is described in Bernardinis, et al., xe2x80x9cA single chip 1,200 sinusoid real-time generator for additive synthesis of musical signalsxe2x80x9d, Proc. of the International Conference on Acoustics, Speech, and Signal Processing (IEEE, 1997), pp. 427-30, according to which a marginally stable second order filter-based oscillator bank generates the sinusoids, and a systolic array of multipliers apply the correct amplitudes to these sinusoids.
Each of these conventional architectures is limited in the accuracy with which the resultant signal is synthesized, primarily due to the limited accuracy with which the phases of the synthesized sinusoids are obtained. The Houghton, et al. approach, in which sinusoid phases are generated by integrating instantaneous frequency, completely ignores phase information and is thus inherently limited in its accuracy. It is believed that the Bernardinis, et al. architecture may produce audible artifacts in certain situations, for example in the case of steep frequency variation. Furthermore, it is believed that neither of these known architectures addresses the need for post-processing the synthesized sinusoids, further limiting their applicability.
It is therefore an object of the present invention to provide a logic architecture for efficiently synthesizing multi-component sinusoidal signals.
It is a further object of the present invention to provide such an architecture that is suitable for implementation as a coprocessor.
It is a further object of the present invention to provide such an architecture for a coprocessor in which the number of sinusoid components that may be synthesized in real time is limited by the data transfer bandwidth between the host processor and the coprocessor, rather than by the sinusoidal computational rate.
It is a further object of the present invention to provide such an architecture in which multi-channel signals may be easily and efficiently generated.
Other objects and advantages of the present invention will be apparent to those of ordinary skill in the art having reference to the following specification together with its drawings.
The present invention may be implemented into a logic architecture, such as may be realized in the form of a coprocessor, for generating multiple component sinusoidal signals on a frame by frame basis. According to the present invention, frame boundary parameters for a specific frame and component are received, for example from a host processor. A first adder recursively determines the instantaneous amplitude of the component at a sample point by adding an amplitude delta value to the instantaneous amplitude from the previous sample point. A second parallel adder determines an instantaneous phase delta value by adding a 2nd order delta value to the phase delta value from the previous sample point; this instantaneous phase delta value is then added to the instantaneous phase value from the previous sample point at a third adder. The output from the first and third adders are applied to a sine function calculator. The output of the sine function calculator is accumulated over all components of the signal, at each of the sample points in the frame. Upon accumulation of the sine function calculator for the final component, each sample point signal value is output, for example to memory or to the host processor.